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  september 2011 doc id 019049 rev 1 1/25 25 ST1843 st1845 rad-tolerant current mode pwm controller features oscillator frequency gua ranteed at 250 khz trimmed oscillator fo r precise frequency control current mode operation to 500 khz automatic feed forward compensation latching pwm for cycle-by-cycle current limiting internally trimmed reference with undervoltage lockout high current totem pole output undervoltage lockout with hysteresis low start-up and operating current hermetic package 50 and 100 krad (si) sel free @ 120 mev/cm2/mg at 125c description the ST1843hr and st1845hr ics are rad- tolerant current mode pw m controllers providing an industry standard solution for the implementation of provides the off-line or dc to dc fixed frequency current mode control schemes with a minimal external parts count. its radiation hardness and hermetic packaging makes it an ideal choice for aerospace and other harsh environments. flat-8 table 1. device summary order codes duty cycle max radiation level qua lity level eppl package lead finish mass (g) ST1843k1 100% 50 krad (si) engineering model - flat-8 gold 0.45 ST1843fkg 100% 50 krad (si) according to escc target flat-8 gold 0.45 st1845k1 50% 100 krad (si) engineering model - flat-8 gold 0.45 st1845rkg 50% 100 krad (si) according to escc target flat-8 gold 0.45 www.st.com
contents ST1843 - st1845 2/25 doc id 019049 rev 1 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 radiation characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 total dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.1.1 bias conditions and total dose level for total dose radiation testing . . . . . 9 6.1.2 electrical measurements for total dose radiation testing . . . . . . . . . . . . 10 6.1.3 heavy ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
ST1843 - st1845 block diagram doc id 019049 rev 1 3/25 1 block diagram figure 1. block diagram (toggle flip flop used only in uc3844b and uc3845b) 89/2 65 9 5() 9 ,17(51$/ %,$6 95()*22' /2*,& 9 7 6 5 26& 59 &855(17 6(16( &203$5$725 5   3:0 /$7&+         (5525$03 9l *5281' 57&7 9)% &203 &855(17 6(16( 95() 9p$ 287387 !-v
maximum ratings ST1843 - st1845 4/25 doc id 019049 rev 1 2 maximum ratings note: all voltages are with respect to pin 5, all cu rrents are positive into the specified terminal. 3 thermal data table 2. absolute maximum ratings symbol parameter value unit v i supply voltage (low impedance source) 30 v supply voltage (ii < 30ma) self limiting i o output current 1 a e o output energy (capacitive load) 5 mj analog inputs (pins 2, 3) ? 0.3 to 5.5 v error amplifier output sink current 10 ma p tot power dissipation at t a 25 c (so8) 800 mw t stg storage temperature range ? 65 to 150 c t j junction operating temperature ? 40 to 150 c table 3. thermal data symbol description flat-8 unit r thja thermal resistance junction-ambient. max. 100 c/w
ST1843 - st1845 pin connection doc id 019049 rev 1 5/25 4 pin connection figure 2. pin connection table 4. pin functions no function description 1 comp this pin is the error amplifier output and is made available for loop compensation. 2 v fb this is the inverting input of the error amplifier. it is normally connected to the switching power supply output through a resistor divider. 3 i sense a voltage proportional to inductor current is connected to this input. the pwm uses this information to terminate the output switch conduction. 4 r t /c t the oscillator frequency and maximum output duty cycle are programmed by connecting resistor rt to vref and capacitor ct to ground. operation to 500 khz is possible. 5 ground this pin is the combined control circuitry and power ground. 6 output this output directly drives the gate of a power mosfet. peak currents up to 1a are sourced and sunk by this pin. 7 v cc this pin is the positive supply of the control ic. 8 v ref this is the reference output. it provides charging current for capacitor ct through resistor rt. !-v &203 9 )% , 6(16( 5 7 & 7 *5281' 287387 9l 9 5()         ',3 62
electrical characteristics ST1843 - st1845 6/25 doc id 019049 rev 1 5 electrical characteristics maximum package power dissipation limits must be respected; low duty cycle pulse techniques are used during test maintain t j as close to t a as possible. unless otherwise stated, these specifications apply for - t a = 22 3c, v i = 15 v, adjust v i above the start threshold before setting at 15 v; r t = 10 k ; c t = 3.3 nf. table 5. electrical characteristics symbol mil-std- 883 test method parameter test conditions values unit min. max. reference section v ref output voltage v i = 15v (1) ; r t = 10k ; c t = 3.3nf, i o = 1ma 4.95 5.05 v v ref_line line regulation 12v v i 25v, r t = 10k ; c t = 3.3nf 0.02 v v ref_load load regulation v i = 15v (1) ; r t = 10k ; c t = 3.3nf, 1 i o 20ma 25 v i sc 3011 output short circuit -0.18 -0.03 a oscillator section f osc frequency for ST1843 v i = 15v (1) ; r t = 10k ; c t = 3.3nf, 1 i o 20ma 49 55 khz frequency for st1845 24.5 27.5 khz f osc / v frequency change with voltage 12v v i 25v; r t = 10k ; c t = 3.3nf ? ? 1% i dischg discharge current v i = 15v (1) ; r t = 10k ; c t = 3.3nf, 1 i o 20ma, v osc = 2v 7.8 7.5 8.8 8.8 ma ma error amp section v 2 input voltage v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin1 = 2.5v 2.45 2.55 v i b 4001 input bias current v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v fb = 5v -1 ma a vol a vol v i = 15v (1) ; r t = 10k ; c t = 3.3nf, 2v v o 4v 65 db psrr 4003 power supply rejec. ratio 12v v i 25v; r t = 10k ; c t = 3.3nf 60 db i o_sink output sink current v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin2 = 2.7v, v pin1 = 1.1v 2ma i o_source output source current v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin2 = 2.2v, v pin1 = 5v -0.5 ma
ST1843 - st1845 electrical characteristics doc id 019049 rev 1 7/25 v oh v out high v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin2 = 2.3v, r l = 15k to gnd 5v v ol v out low v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin2 = 2.3v, r l = 15k to gnd 1.1 v current sense section g v 4004 gain v i = 15v (1) ; r t = 10k ; c t = 3.3nf, (2) (3) 2.85 3.15 v/v v 3 maximum input signal v i = 15v (1) ; r t = 10k ; c t = 3.3nf, v pin1 = 2.3v (2) 0.9 1.1 v svr supply voltage rejection 12 v i 25v; r t = 10k ; c t = 3.3nf, (1) 60 db i b 4001 input bias current v i = 15v (1) ; r t = 10k ; c t = 3.3nf -10 ma d o 3003 delay to output v i = 15v (1) ; r t = 10k ; c t = 3.3nf 300 ns output section v ol1 3007 output low level v i = 15v (1) ; r t = 10k ; c t = 3.3nf; i sink = 20ma 0.4 v v ol2 v i = 15v (1) ; r t = 10k ; c t = 3.3nf; i sink = 200ma 2.2 v v oh1 3006 output high level v i = 15v (1) ; r t = 10k ; c t = 3.3nf; i source = 20ma 13 v v oh2 v i = 15v (1) ; r t = 10k ; c t = 3.3nf; i source = 200ma 12 v v ols uvlo saturation v i = 6v (1) ; r t = 10k ; c t = 3.3nf; i sink = 1ma 1.1 v t r 3004 rise time v i = 15v (1) ; r t = 10k ; c t = 3.3nf; c l = 1nf 150 ns t f fall time 150 ns under-voltage lockout section v th start threshold v i = 15v (1) ; r t = 10k ; c t = 3.3nf 7.8 9 v v min min operating voltage after turn-on v i = 15v (1) ; r t = 10k ; c t = 3.3nf 7 8.2 v dc max max duty cycle for ST1843 v i = 15v (1) ; r t = 10k ; c t = 3.3nf 47 50 % max duty cycle for st1845 94 100 % dc min min duty cycle v i = 15v (1) ; r t = 10k ; c t = 3.3nf 0 % total standby current i st start-up current v i = 15v (1) ; r t = 10k ; c t = 3.3nf 0.5 ma table 5. electrical characteristics (continued) symbol mil-std- 883 test method parameter test conditions values unit min. max.
electrical characteristics ST1843 - st1845 8/25 doc id 019049 rev 1 i i 3005 operating supply current v i = 15v (1) ; r t = 10k ; c t = 3.3nf v pin2 = v pin3 = 0v 17 ma v iz zener voltage v i = 15v (1) ; r t = 10k ; c t = 3.3nf i i = 25ma 30 v 1. adjust vi above the start threshold before setting at 15v 2. parameter measured at trip point of latch with v pin2 = 0. 3. gain defined as: table 5. electrical characteristics (continued) symbol mil-std- 883 test method parameter test conditions values unit min. max. a v pin1 v pin3 ------------------- 0 v pin3 0.8v ? ; =
ST1843 - st1845 radiation characteristics doc id 019049 rev 1 9/25 6 radiation characteristics 6.1 total dose the total dose results are pr ovided in the following table: these results are obtained on the following conditions: 6.1.1 bias conditions and tota l dose level for total dose radiation testing continuous bias shall be applied during irradiation testing as specified below. the total dose level applied shall be as specified in the component type variant information here in or in purchaser order. figure 3. unbias conditions table 6. total dose performance device total dose ST1843hr 50 krad (si) st1845hr 100 krad (si) 34     '.$ '.$ /54054 #/-0 6 &3 6 2ef 6 senze 2 4 <# 4 6 )  6 )     34     '.$ '.$ /54054 #/-0 6 &" 6 2ef ) senze 2 4 <# 4    6 ## 
radiation characteristics ST1843 - st1845 10/25 doc id 019049 rev 1 6.1.2 electrical measu rements for total dose radiation testing prior to irradiation testing the devices shall have successfully met room temperature electrical measurements specified herein. unless otherwise stated the measurements shall be performed at t a = +22 3 c the test methods and test conditions shall be as per the corresponding test defined in electrical measurements at room temperature. the parameters to be measured during and on completion of irradiation testing are shown below. table 7. electrical paramete r during irradiation testing symbol parameter test conditions values unit min. max. reference section v ref output voltage for ST1843 v i = 15v; r t = 10k ; c t = 3.3nf, i o = 1ma 4.95 5.15 v output voltage for st1845 4.85 5.15 v ref_line line regulation 12v v i 25v, r t = 10k ; c t = 3.3nf 0.02 v v ref_load load regulation v i = 15v; r t = 10k ; c t = 3.3nf, 1 i o 20ma 0.025 v i sc output short circuit current v i = 15v; r t = 10k ; c t = 3.3nf -0.18 -0.03 a oscillator section f osc frequency v i = 15v; r t = 10k ; c t = 3.3nf 49 65 khz f osc / v frequency change with voltage 12v v i 25v, r t = 10k ; c t = 3.3nf -1 1 % idischg discharge current v i = 15v; r t = 10k ; c t = 3.3nf ; v osc = 2v 0.0078 0.0088 a error amp section v 2 i nput voltage for ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; vpin1 = 2.5v 2.45 2.6 v i nput voltage for st1845 2.45 2.55 i b input bias current ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; v fb = 5v -2.75 a input bias current st1845 -2.8 avol avol for ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; 2v v o 4v 60 db avol for st1845 62 psrr power supply rejection ratio 12v v i 25v, r t = 10k ; c t = 3.3nf 60 db io_sink output sink current v i = 15v; r t = 10k ; c t = 3.3nf ; vpin2 = 2.7v; vpin1 = 1.1v 2ma io_source output source current v i = 15v; r t = 10k ; c t = 3.3nf ; vpin2 = 2.3v; vpin1 = 5v -0.5 ma v oh vout high v i = 15v; r t = 10k ; c t = 3.3nf ; vpin2 = 2.3v; rl = 15k to gnd 5v v ol vout low v i = 15v; r t = 10k ; c t = 3.3nf ; vpin2 = 2.3v; r l = 15k to pin 1.1 v
ST1843 - st1845 radiation characteristics doc id 019049 rev 1 11/25 current sense section g v gain v i = 15v; r t = 10k ; c t = 3.3nf ; 2.85 3.15 v/v v3 maximum input signal v i = 15v; r t = 10k ; c t = 3.3nf; vpin1 = 2.3v; 0.9 1.1 v svr supply voltage rejection 12v v i 25v; r t = 10k ; c t = 3.3nf; 60 db i b input bias current ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; -50 a input bias current st1845 -45 d o delay to output v i = 15v; r t = 10k ; c t = 3.3nf ; 300 ns output section v ol1 output low level v i = 15v; r t = 10k ; c t = 3.3nf ; i sink = 20ma 0.4 v v ol2 output low level v i = 15v; r t = 10k ; c t = 3.3nf ; i sink = 200ma 2.2 v v oh1 output high level v i = 15v; r t = 10k ; c t = 3.3nf ; i source = 20ma 13 v v oh2 output high level v i = 15v; r t = 10k ; c t = 3.3nf ; i source = 200ma 12 v v ols uvlo saturation v i = 15v; r t = 10k ; c t = 3.3nf ; i sink = 1ma 1.1 v t r rise time v i = 15v; r t = 10k ; c t = 3.3nf ; c l = 1nf 180 ns t f fall time v i = 15v; r t = 10k ; c t = 3.3nf ; c l = 1nf 180 ns under-voltage lockout section v th start threshold for ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; 7.8 9.5 v start threshold for st1845 7.8 10.5 v min min operating voltage after turn-on for ST1843 v i = 15v; r t = 10k ; c t = 3.3nf ; 78.6 v min operating voltage after turn-on for st1845 79 dcmax max duty cycle v i = 15v; r t = 10k ; c t = 3.3nf ; 94 100 % dcmin min duty cycle v i = 15v; r t = 10k ; c t = 3.3nf ; 0% total stand-by current i st start-up current v i = 6.5v; r t = 10k ; c t = 3.3nf ; 0.5 ma i i operating supply current v i = 15v; r t = 10k ; c t = 3.3nf ; vpin2 = vpin3 = 0v 17 ma viz zener voltage v i = 15v; r t = 10k ; c t = 3.3nf ; i i = 25ma 30 v table 7. electrical para meter during irradiation testing (continued) symbol parameter test conditions values unit min. max.
radiation characteristics ST1843 - st1845 12/25 doc id 019049 rev 1 6.1.3 heavy ions both devices have been tested sel free at 120 mev/cm2/mg at 125c
ST1843 - st1845 test circuit doc id 019049 rev 1 13/25 7 test circuit figure 4. open loop test circuit high peak currents associated with capacitive loads necessitate careful grounding techniques. timing and bypass capacitors should be connected close to pin 5 in a single point ground. the transistor and 5 k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. !-v 5 7 $ 1 . 7 . 7 (5525$03 $'-867 . 7 . 7 , 6(16( $'-867 . 7 &203 9 )% , 6(16( 5 7 & 7     & 7     9 5() 9 l 287387 *5281'  m )  m ) 9 5() 9 l 287387 *5281' : . 7 8&% figure 5. timing resistor vs. oscillator frequency figure 6. output dead-time vs. oscillator frequency !-v . . . . . . . . i 26& .+]       ',1 & 7 q) & 7 q) & 7 q) & 7 q) & 7 s) & 7 s) & 7 s) 9 l 9 7 $ ?& 57 . 7  !-v . . . . . . . . i26& .+]          & 7 q) & 7 q) & 7 q) & 7 q) & 7 s) & 7 s) & 7 s) 9 l 9 7 $ ?&
test circuit ST1843 - st1845 14/25 doc id 019049 rev 1 figure 7. oscillator discharge current vs. temperature figure 8. maximum output duty cycle vs. timing resistor !-v        7 $ ?&     , glvfkj p$ 9 l 9 9 26& 9 !-v        ' pd[  5    7 . 7 9 l 9 & 7 q) 7 $ ?& , glvfkj p$ , glvfkj p$ figure 9. error amp open-loop gain and phase vs. frequency figure 10. current sense input threshold vs. error amp output voltage !-v   . . . 0 i +]       g%       f 9 l 9 9 2 9wr9 5 / . 7 $ ?& *dlq 3kdvh !-v  9 2 9       9 wk 9 9 l 9 7 $ ?& 7 $ ?& 7 $ ?&
ST1843 - st1845 test circuit doc id 019049 rev 1 15/25 figure 11. reference voltage change vs. source current figure 12. reference short circuit current vs. temperature !-v  , uhi p$        9 l 9 7 $ ?& 7 $ ?& 7 $ ?& !-v   7 $ ?&       , 6& p$ 9 l 9 5 / b  7 figure 13. output saturation voltage vs. load current figure 14. supply current vs. supply voltage !-v     , 2 p$       9 vdw 9 9 l 9  m v3xovhg/rdg+]5dwh 7 $ ?& 7 $ ?& 9 l 7 $ ?& 7 $ ?& *1' 6lqn6dwxudwlrq /rdgwr9 l 6rxufh6dwxudwlrq /rdgwr*urxqg !-v 9 l 9      , l p$ 8&; 8&; 5 7 . & 7 q) 9 )% 9 , 6hqvh 9 7 $ ?&
test circuit ST1843 - st1845 16/25 doc id 019049 rev 1 figure 17. oscillator and output waveforms figure 15. output waveform figure 16. output cross conduction !-v 9 l  9 & /  q) 7 $  ?&   qv',9 !-v 9 l  9 & /  s) 7 $  ?& 9 2 , && qv',9 p$',9 9',9 !-v 95(* 26&,//$725 3:0 &/2&.     5 7 & 7 *1' 287387  9 l , ' &7 287387 /$5*(5 7 60$//& 7 &7 287387 60$//5 7 /$5*(& 7
ST1843 - st1845 test circuit doc id 019049 rev 1 17/25 figure 18. error amp configuration figure 19. under voltage lockout figure 20. current sense circuit peak current (is) is determined by the formula: a small rc filter may be requir ed to suppress switch transients. !-v = l = i p$   9 )% &203 9   !-v 8&% 8&% 8&% 8&% 9 9 9 9 9 21 9 2)) 9 l 212))&200$1' 725(672),&  p$ p$ , && 9 && 9 2)) 9 21 'xulqj89/2wkh2xwsxwlvorz !-v (5525 $03/ 5 59 &855(17 6(16( &203$5$725  &855(17 6(16( &203 & 5 6 5   *1' , 6 i smax 1.0v r s ------------
test circuit ST1843 - st1845 18/25 doc id 019049 rev 1 figure 21. slope compensation techniques figure 22. isolated mosfet drive and current transformer sensing !-v 5 6 5  , 6 5 6/23( & 7 5 7 9 5(*  5 7 & 7 , 6(16(    *1' 5 6 5  , 6 5 6/23( & 7 5 7 9 5(*  5 7 & 7 , 6(16(    *1' 8&% 8&% !-v   &203/$7&+ ,62/$7,21 %281'$5< 9 uhi 9 &&     4 6 5    5 5 6 1 6 & 9 lq 4 1 3 9 *6 :dyhirupv       '& '& , sn  9 slq  5 6 1 6 1 3
ST1843 - st1845 test circuit doc id 019049 rev 1 19/25 figure 23. latched shutdown figure 24. error amplifier compensation !-v %,$6   ($ 5  26& 1  1  p$ 5 5 5     6&5pxvwehvhohfwhgirudkroglqjfxuuhqwriohvvwkdqp$d w7 $ plq  7khvlpsohwzrwudqvlvwruflufxlwfdqehxvhglqsodfhriwkh6 &5dvvkrzq$oouhvlvwruvduh.  !-v ',1   ($ 5 l  p$ 5 g 5 5  & i 5 i   )urp9 2 9   ($ 5 3  p$ 5 g 5 5  & i 5 i   )urp9 2 9 (uuru$psfrpshqvdwlrqflufxlwiruvwdelol]lqjdq\fxuuhqwprgh wrsrorj\h[fhsw iruerrvwdqgio\edfnfrqyhuwhuvrshudwlqjzlwkfrqwlqxrxvlqgx fwrufxuuhqw & 3 5 l (uuru$psfrpshqvdwlrqflufxlwiruvwdelol]lqjfxuuhqwprgherr vwdqgio\edfn wrsrorjlhvrshudwlqjzlwkfrqwlqxrxvlqgxfwrufxuuhqw
test circuit ST1843 - st1845 20/25 doc id 019049 rev 1 figure 25. external clock synchronization figure 26. external duty cycle clamp and multi unit synchronization !-v   ($  5 5  5 7   (;7(51$/ 6<1&,1387 7khglrghfodpslvuhtxluhgliwkh6\qfdpsolwxghlvodujhhqrx jkwrfdxvh wkherwwrpvlghri& 7 wrjrpruhwkdqp9ehorzjurxqg 5 %,$6 26& & 7  m )  7   9 5() 5 !-v    5 $   i 5 %,$6 26& &  9 5() 5 5 %     ($ 5 5 5 6 4     . . . 1(      72$'',7,21$/ 8&;;$v  5 $ 5 % & ' pd[  5 % 5 $ 5 %
ST1843 - st1845 test circuit doc id 019049 rev 1 21/25 figure 27. soft-start circuit figure 28. soft-start and error amplifier output duty cycle clamp !-v  5 %,$6 26& & 5     ($ 5 5 5 6 4      p$ 9   9 uhi 0 7 !-v  5 %,$6 26& & 5     ($ 5 5 5 6 4      p$ 9   9 uhi 5 5 9 &odps   &rps/dwfk  5 6 9 && 4 9 lq    %& 9 &/$03 a 5  5  5  zkhuh9 &/$03 9 , sn pd[  9 &/$03 5 6
package mechanical data ST1843 - st1845 22/25 doc id 019049 rev 1 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. figure 29. package dimensions table 8. flat-8 mechanical data dim. mm. inch min typ max min typ max a 2.24 2.44 2.64 0.088 0.096 0.104 b 0.38 0.43 0.48 0.015 0.017 0.019 c 0.10 0.13 0.16 0.004 0.005 0.006 d 6.35 6.48 6.61 0.250 0.255 0.260 e 6.35 6.48 6.61 0.250 0.255 0.260 e2 4.32 4.45 4.58 0.170 0.175 0.180 e3 0.88 1.01 1.14 0.035 0.040 0.045 e 1.27 0.050 l 6.51 - 7.38 0.256 - 0.291 q 0.66 0.79 0.92 0.026 0.031 0.036 s1 0.92 1.12 1.32 0.036 0.044 0.052 n 08 08
ST1843 - st1845 ordering information doc id 019049 rev 1 23/25 9 ordering information table 9. ordering information order codes quality level eppl pack age lead finish marking packing ST1843k1 engineering model - flat-8 gold ST1843k1 strip pack ST1843fkg according to escc target flat-8 gold ST1843fkg strip pack st1845k1 engineering model - flat-8 gold st1845k1 strip pack st1845rkg according to escc target flat-8 gold st1845rkg strip pack
revision history ST1843 - st1845 24/25 doc id 019049 rev 1 10 revision history table 10. document revision history date revision changes 12-sep-2011 1 first revision
ST1843 - st1845 doc id 019049 rev 1 25/25 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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